How gates add numbers
One XOR and one AND gate are enough to add two bits. Chain four full adders and you can add any two numbers from 0 to 15.
Try this before reading on. Add 0101 and 0011 on paper, in binary, the way you add in decimal, and write each carry above the next column. You need only three facts: 0 + 0 = 0, 0 + 1 = 1, and 1 + 1 = 10, which means write 0 and carry 1. With a carry coming in, 1 + 1 + 1 = 11, so you write 1 and carry 1. The working is in the next paragraph, so cover it up first.
Here is the working. Rightmost column: 1 + 1 = 10, write 0, carry 1. Next: 0 + 1 plus the carry is 10 again, write 0, carry 1. Next: 1 + 0 plus the carry, 10, write 0, carry 1. Leftmost: 0 + 0 plus the carry is 1. The answer is 1000, which is 8, and 5 + 3 = 8. Three of the four columns carried. A calculator, a game and a spreadsheet all end up doing exactly this. Inside a processor each column is handled by a few gates, and the scene starts on the same sum. Then try 9 + 8 there. It needs a fifth bit.
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The rightmost column needs only two gates
Look at the rightmost column on its own. The answer bit there, the sum, is 1 when exactly one input is 1. That is the XOR rule. The carry is 1 only when both inputs are 1. That is the AND rule. So an XOR gate and an AND gate side by side, fed the same two inputs, add two bits. This little circuit is a half adder. It is only "half" because it has no way to take in a carry from a column to its right.
The other columns have three bits to add
In every other column three bits meet: one from each number and the carry from the right. A full adder takes all three. Its sum is A XOR B XOR carry-in, which is 1 when an odd number of the three are 1. Its carry-out is 1 when at least two of them are 1. Two half adders and an OR gate make one full adder. Line up four full adders, wire each carry-out to the carry-in of the adder on its left, and you have a 4-bit adder. Each carry has to ripple from right to left before the last column settles, so this design is called a ripple-carry adder. Real processors add 64-bit numbers with cleverer circuits that work out the carries ahead of time, but the rule in each column is the same.
| A | B | Carry in | Sum | Carry out |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 1 | 1 | 1 |
What happens when the answer is too big
Four bits hold 0 to 15. Add 9 and 8 and the true answer, 17, is 10001 in binary, which is five bits. A register that keeps only four bits stores 0001, which is 1, and the carry left over on the left is the warning sign. That is overflow. 15 + 1 in four bits leaves 0000. Processors set a flag when it happens so that programs can notice. Subtraction reuses the same adder. To work out A − B, the processor flips every bit of B and adds 1, which gives the two's complement of B, then adds that to A and drops the extra carry. For 5 − 3 in four bits: 3 is 0011, flipped it is 1100, plus 1 it is 1101. Then 0101 + 1101 = 10010, and keeping four bits leaves 0010, which is 2.
Multiplying is shifting and adding
Multiplication comes from the same parts. In binary, multiplying by 2 moves every bit one place to the left, just as multiplying by 10 adds a zero in decimal: 0011 (3) becomes 0110 (6). For 5 × 3, notice that 3 is 2 + 1. So 5 × 3 = 5 × 2 + 5 × 1 = 1010 + 0101 = 1111, which is 15. A multiplier circuit shifts and adds like this, taking the 1 bits of the second number one at a time.
- "1 + 1 = 2, so the answer fits in one bit." A bit holds only 0 or 1. 1 + 1 = 10: the sum bit is 0 and a 1 is carried. Drop the carry and the answer becomes 0, which is wrong.
- "A half adder can add numbers of any length." A half adder has no input for a carry from the right, so it only works in the rightmost column. Every other column needs a full adder with three inputs. A 4-bit adder could use one half adder and three full adders.
- "Overflow makes the computer stop with an error." The adder simply keeps the bits it has room for. 9 + 8 in four bits gives 0001, a wrong answer that looks perfectly ordinary. The processor sets a flag, and the program has to check it.
- "Subtraction needs its own subtracting circuit." Flip the bits of B, add 1 and add the result to A with the same adder. 5 − 3: 0101 + 1101 = 10010, and the four lowest bits, 0010, are 2.
- What is 1 + 1 in binary?
- In a half adder, which gate gives the sum bit?
- XOR
- AND
- OR
- NOT
- In a half adder, which gate gives the carry?
- AND
- XOR
- OR
- NAND
- How many input bits does a full adder take?
- A full adder gets A = 1, B = 1, carry in = 1. What is its sum bit?
- Add 0110 and 0011. Give four bits.
- A 4-bit register adds 9 + 8 and keeps only four bits. What number does it hold?
- What is the 4-bit two's complement of 0011?
- How many full adders does a ripple-carry adder for 8-bit numbers need?
- What is the largest sum two 4-bit numbers can make?
- Half adder: sum = A XOR B, carry = A AND B.
- Full adder: three inputs; sum is 1 for an odd count of 1s, carry for two or more.
- Chained full adders form a ripple-carry adder; carries move right to left.
- Overflow: the result needs more bits than the register has. Subtraction adds the two's complement.
Sources for this course (9)
- (checked 2026-10-17; reordered 2026-10-19: standards first, then official documentation, then the teaching model and calculations, history sources last)
- Standards: NIST, "Prefixes for binary multiples" (physics.nist.gov/cuu/Units/binary.html: IEC approved kibi, mebi, gibi in December 1998; 1 B = 8 bit; 1 MiB = 1 048 576 B; 1 MB = 1 000 000 B; 1 GiB = 1 073 741 824 B; historical note: memory makers usually mean 2²⁰ bytes by megabyte, storage makers 1 000 000, and the "1.44 MB" diskette uses a megabyte of 1 024 000 bytes)
- IETF RFC 20 "ASCII format for Network Interchange" (1969, 7-bit codes, A = 65, a = 97, 0 = 48)
- IETF RFC 3629 "UTF-8, a transformation format of ISO 10646" (2003: 1 to 4 octets per character, ASCII unchanged, code points up to U+10FFFF, U+0800 to U+FFFF take three octets, "the first octet of a multi-octet sequence indicates the number of octets", example U+D55C U+AD6D U+C5B4 = ED 95 9C EA B5 AD EC 96 B4)
- Official documentation: MDN Web Docs, "<color>" (hexadecimal colour notation #RRGGBB)
- Intel, "Intel Chips" timeline poster (2012: Intel 4004 of 1971 with 2,300 transistors; 2nd generation Core 2010 with 1.16 billion)
- Claude E. Shannon, "A Symbolic Analysis of Relay and Switching Circuits", Transactions of the AIEE vol. 57 (1938)
- abstract of his MIT master's thesis. Computer History Museum, The Silicon Engine, "1947: Invention of the Point-Contact Transistor" (Bardeen and Brattain, December 1947, germanium)
- John von Neumann, "First Draft of a Report on the EDVAC" (30 June 1945, Moore School, reprinted in IEEE Annals of the History of Computing 15:4, 1993).
Checked: 2026-10-17